All contemporary computer designs are based on concepts developed by John von Neumann.
Key Concepts of von Neumann architecture:
Data and instructions are stored in a single read–write memory
The contents of this memory are addressable by location
Execution occurs in a sequential fashion
The CPU exchanges data with memory by using memory address register (MAR) and memory buffer register (MBR).
MAR specifies the address in memory for the next read or write.
MBR contains the data to be written into memory or receives the data read from memory.
Similarly, I/O address register (I/OAR) specifies a particular I/O device. An I/O buffer register (I/OBR) is used to exchange data between an I/O module and the CPU.
Memory module
set of locations, defined by sequentially numbered addresses. Each location contains a binary number.
In a typical processor, a register called the program counter (PC) holds the address of the instruction to be fetched next.
The processor reads (fetches) instructions from memory one at a time and executes each instruction. The fetched instruction is loaded into a register in the processor known as the instruction register (IR).
Program execution consists of repeating the process of instruction fetch (fetch cycle) and instruction execution (execute cycle).
The processing required for a single instruction is called an instruction cycle.
Virtually all computers provide a mechanism by which other modules (I/O, memory) may interrupt the normal processing of the processor.
Classes of Interrupts
- Program
- Timer
- I/O
- Hardware failure
Interrupts are provided primarily as a way to improve processing efficiency.